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The Tenth IEEE Workshop on RTL and High Level Testing
(WRTLT 2009)

November 27-28, 2009
Chinese University of Hong Kong
Hong Kong SAR, China

http://conferences.cse.cuhk.edu.hk/wrtlt09/

CALL FOR PAPERS
Scope -- Submissions -- Key Dates -- Additional Information -- Committees

Scope

The purpose of this workshop is to bring researchers and practitioners on LSI testing from all over the world together to exchange ideas and experiences on register transfer level (RTL) and high level testing. WRTLT'09, the tenth workshop, will be held in Hong Kong SAR, China. We expect this workshop to provide an ideal forum for frank discussion on this important topic for the future system-on-a-chip (SoC) devices.

Areas of interest include but are not limited to:

  • Functional fault modeling
  • RTL ATPG
  • Microprocessor testing
  • RTL BIST
  • Relationship between RTL and gate level testing
  • Design verification
  • High level test bench generation
  • SoC testing
  • High level approaches for testing
  • RTL DFT

Submissions

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Authors are invited to submit paper proposals for presentation at the workshop. The proposal may be an extended summary (1,000 words) or a full paper and should include: title, full name and affiliation of all authors, 50 words abstract, keywords and the name of contact author. All submissions should be sent to the following address as Postscript or PDF attachment.

wrtlt09@cse.cuhk.edu.hk

The submission will be considered evidence that upon acceptance the author(s) will prepare the final manuscript in time for inclusion in the digests and will present the paper at the Workshop.

Key Dates

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Submission deadline: August 4, 2009
Notification of acceptance: September 11, 2009
Final copy deadline: October 10, 2009

Additional Information
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Email: wrtlt09@cse.cuhk.edu.hk

Committees
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General Chair
Krishnendu Chakrabarty
Duke University

Program Co-Chair(s)
Qiang Xu
The Chinese University of Hong Kong
Yinhe Han
Institute of Computing Technology, CAS

Panel Chair
Yu Huang
Mentor Graphics

Publicity Chair
Lei Zhang
Institute of Computing Technology, CAS

Publication Chair
Wei Wang
HeFei University of Technology, China

Finance Chair
Yubin Zhang
The Chinese University of Hong Kong

Registration Chair
Xiao Liu
The Chinese University of Hong Kong

Local Arrangement Chair
Feng Yuan
The Chinese University of Hong Kong

Ex Officio
Kazumi Hatayama
STARC, Japan

Steering Committee

Chair: Xiaowei Li, China
Vice-Chair: Tomoo Inoue, Japan
Members:
Hideo Fujiwara, Japan
Terumine Hayashi, Japan
Kazuhiko Iwasaki, Japan
Erik Larsson, Sweden
Alex Orailoglu, USA
Kewal K. Saluja, USA

Program Committee

Bhargab Bhattacharya
Jinian Bian
Masaki Hashizume
Terumine Hayashi
Toshinori Hosokawa
Yu Hu
Yu Huang
Michiko Inoue
Tomoo Inoue
Seiji Kajihara
Erik Larsson
Chien-Mo Li
Huawei Li
Huaguo Liang
Jing-Jia Liou
Srinivas Patil
Tsuyoshi Shinogi
Virendra Singh
Mohammad Tehranipoor
Baosheng Wang
Xiaoqing Wen
Dong Xiang
Tomokazu Yoneda
Zhiqiang You
Danella Zhao

 

For more information, visit us on the web at: http://conferences.cse.cuhk.edu.hk/wrtlt09/

The Tenth IEEE Workshop on RTL and High Level Testing (WRTLT09) is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC), and the Technical Group on Dependable Computing, IEICE .


IEEE Computer Society- Test Technology Technical Council

TTTC CHAIR
Adit D. SINGH
Auburn University - USA
Tel. +1-334-844-1847
E-mail adsingh@eng.auburn.edu

PAST CHAIR
André IVANOV
University of British Columbia - Canada
Tel. +1-604-822-6936
E-mail ivanov@ece.ubc.ca

TTTC 1ST VICE CHAIR
Michael NICOLAIDIS
TIMA Laboratory - France
Tel. +33-4-765-74696
E-mail michael.nicolaidis@imag.fr

SECRETARY
Christian LANDRAULT
LIRMM - France
Tel. +33-4-674-18524
E-mail landrault@lirmm.fr

ITC GENERAL CHAIR
Gordon W. ROBERTS
McGill University
- Canada
Tel.
E-mail gordon.roberts@mcgill.ca

TEST WEEK COORDINATOR
Yervant ZORIAN
Virage Logic Corporation - USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com

TUTORIALS AND EDUCATION
Dimitris GIZOPOULOS

University of Piraeus
- Greece
Tel. +30-210-414-2372
E-mail dgizop@unipi.gr

STANDARDS
Rohit KAPUR

Synopsys
, Inc. - USA
Tel. +1-650-934-1487
E-mail rkapur@synopsys.com

EUROPE
Zebo PENG
Linköping University - Sweden
Tel. +46-13-282-067/-281-000
E-mail zpe@ida.liu.se

MIDDLE EAST & AFRICA
Ibrahim HAJJ
American University of Beirut - Lebanon
Tel. +961-1-341-952
E-mail ihajj@aub.edu.lb

STANDING COMMITTEES
André IVANOV
University of British Columbia - Canada
Tel. +1-604-822-6936
E-mail ivanov@ece.ubc.ca

ELECTRONIC MEDIA
Alfredo BENSO
Politecnico di Torino - Italy
Tel. +39-011-564-7080
E-mail alfredo.benso@polito.it

 

PRESIDENT OF BOARD
Yervant ZORIAN
Virage Logic Corporation- USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com

SENIOR PAST CHAIR
Paolo PRINETTO
Politecnico di Torino - Italy
Tel. +39-011-564-7007
E-mail Paolo.Prinetto@polito.it

TTTC 2ND VICE CHAIR
Chen-Huan CHIANG

Alcatel-Lucent
- USA
Tel. +1-973-386-6759
E-mail chenhuan@alcatel-lucent.com

FINANCE
Michael NICOLAIDIS
TIMA Laboratory - France
Tel. +33-4-765-74696
E-mail michael.nicolaidis@imag.fr

IEEE DESIGN & TEST EIC
K.T. (Tim) CHENG
University of California, Santa Barbara - USA
Tel. +1-805-893-72942
E-mail timcheng@ece.ucsb.edu

TECHNICAL MEETINGS
Chen-Huan CHIANG
Alcatel-Lucent
- USA
Tel. +1-973-386-6759
E-mail chenhuan@alcatel-lucent.com

TECHNICAL ACTIVITIES
Matteo SONZA REORDA
Politecnico di Torino - Italy
Tel.+39-011-564-7055
E-mail matteo.sonzareorda@polito.it

ASIA & PACIFIC
Kazumi HATAYAMA
STARC - Japan
Tel. +
E-mail hatayama.kazumi@starc.or.jp

LATIN AMERICA
Victor Hugo CHAMPAC
Instituto Nacional de Astrofisica - Mexico
Tel.+52-22-470-517
E-mail champac@inaoep.mx

NORTH AMERICA
William R. MANN
SW Test Workshop - USA
Tel. +1-949-645-3294
E-mail william.mann@ieee.org

COMMUNICATIONS
Cecilia METRA
Università di Bologna - Italy
Tel. +39-051-209-3038
E-mail cmetra@deis.unibo.it

INDUSTRY ADVISORY BOARD
Yervant ZORIAN
Virage Logic Corporation- USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com


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